NEWS ALERT!!!! Wake UP Guru!!!!! TIme to pump and blow harder, Guru!!!
https://www.semiconductor-today.com/news_items/2012/MAR/ODIS_280312.html
ODIS progresses towards roadmap for GaAs-based POET technology
OPEL Technologies Inc of Toronto, Ontario, Canada, which makes photovoltaic (PV) panels and solar tracker systems through its subsidiary OPEL Solar Inc, has reported what it describes as significant progress this quarter by its US affiliate OPEL Defense Integrated Systems (ODIS Inc) of Shelton, CT (which develops III-V semiconductor devices and processes) regarding the application of its Planar Opto Electronic Technology (POET) to the optical interconnection of high-speed circuits. ODIS’ recent achievements, when added to the POET platform under development, will make it possible for the first time, it is reckoned, to implement an optical interface as a single chip to connect existing CMOS processors.
Initially developed by Dr Geoffrey Taylor at the University of Connecticut and licensed to OPEL, POET is a fabrication technology that enables the dense packing of digital, analog and optical circuits on a single gallium arsenide (GaAs) chip. It now makes it possible to monolithically integrate a range of electronic and optoelectronic functions in a single chip with higher speeds and reduced power consumption compared to silicon CMOS. For the same functionality, the chip size can be reduced considerably.
OPEL says that the latest advances are ongoing steps in the development of POET that have made it possible to produce a well defined military and commercial roadmap for POET.
ODIS’s optical interface chip will integrate a laser, optical modulator, modulator driver, detector, receiver amplifiers, SerDes, CDR and PLL circuits monolithically on a single chip. Using GaAs technology, this is the first step in achieving a single device capable of interconnecting multiple processors by waveguides and/or fiber to transport ultra-high-speed signals, the firm says.
The development simplifies chip packaging, while the optical interface chip bandwidth supports the very large data rates (>100Gb/s) required for CMOS processor interconnection without the additional power otherwise required with conventional electrical I/O (input/output). The new roadmap will outline the process for speed-to-market devices, capital requirements and monetization opportunities in the commercial and defense technology markets, the firm adds.