RE: RE: The optical interface chipnp I believe the near term optical interconnect only requires up to MS4 but includes integration of the laser in fab. I am starting to get a sense that they want to announce the production of the laser at BAE and not just the detector for the IR chip as part of MS4 reporting. It is these kinds of questions which will hopefully become very clear and detailed in the new corporate presentation.
Definitely a good question np. After listening to the following audio clip from the lab tour it becomes clear that producing the laser at BAE would be the next step after producing the laser at the UCONN Lab. The laser is not required for the IR detector which is associated with MS4 however they may have shuffled the deck.
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MS4 ….Breakthrough sensor technology for un-cooled IR detector, which is a key sensor for infrared industry applications that generates minimal heat, enabling compact sensor devices
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It is obvious from the clip below that they intend to use the BAE facility to produce the laser. This is now probably what they consider as part of MS4?
https://www.youtube.com/watch?v=B_fTMAcyf-4
One more comment about this clip. When people start wondering why someone else could not do what POET does. Taylor explains it very well but just to clarify what he is saying. CMOS requires high temperature steps in order produce transistors. Taylors laser if fully integrated into the chip which contains all the electronic components to drive it. These electronic components require high temperature annealing steps but no one has figured out how to put a laser through a high temperature anneal until the POET design. Obviously there are many other elements that have to come together to make this work. A big barrier being the level of efficiency required to minimize the production of heat within the chip when transferring energy from electronic to photonic state. Taylors devices achieve a very high level of efficiency thus the heat generated is minimal. GaAs is a very superior conductor of electricity over silicon which means much less heat is generated for all electronic processes. We have all heard about the enormous amount of heat generated by silicon chips. The only reason silicon can tolerate this level of inefficiency is because the material has good thermal conducting characteristics. I think it can transfer as much as 5 times the heat that GaAs can. But that is obviously its weakness to. Energy management has become not only a big concern in mobile devices but also at the data centers throughout the world which are consuming a significant percentage of our global electricity production.
POET is an amazing design and I’ll just share one comment that I heard recently. POET is the best kept secret in the industry right now. Lee Shepherd is turning that around and hopefully we will start seeing evidence of this very soon.