RE:what is the ultimate size 100 nm?
If you look at slide 8 (fig 7) of images contained in the thyristor memory patent you will see the following statement: Scaling superiority: thyristor/HFETs scale to <20nm nodes much more easily than cmos because oxide scaling is eliminated. https://www.google.com/patents/us20140050022?dq=20140050022&hl=en&sa=x&ei=oo0pu6i3legyyag4p4cgcq&ved=0cdmq6aewaa nodes="" much="" more="" easily="" than="" cmos="" because="" oxide="" scaling="" is="" eliminated.="" https://www.google.com/patents/us20140050022?dq="20140050022&hl=en&sa=X&ei=OO0PU6i3LeGyyAG4p4CgCQ&ved=0CDMQ6AEwAA">20nm nodes much more easily than cmos because oxide scaling is eliminated. https://www.google.com/patents/us20140050022?dq=20140050022&hl=en&sa=x&ei=oo0pu6i3legyyag4p4cgcq&ved=0cdmq6aewaa >