RE: RE: POET rival (in one vertical)? This part about the VCSELs is it good? ... can someone explain how this pairs up beside ODIS?
The icPhotonics chip is built around a matrix of 168 VCSELs -- each capable of transmitting at 8 Gbit/s for a total theoretical limit of 1.3 Tbit/s -- and a corresponding bank of photodiodes. Compass-EOS says it uses silicon photonics inside the chip, as well as some proprietary and not-so-easily-invented techniques that allow the VCSELs to sit properly above the rest of the chip.
Inside the r10004, there's no midplane, no backplane and no switch fabric. Line cards are connected by the optical interconnect into a full mesh.
Read more at https://www.stockhouse.com/bullboards/messagedetail.aspx?s=OPL&t=LIST&m=32324158&l=0&pd=0&r=0&msg=3#WmvjEm5T0CUeUl4h.99
thoughts from the anyone?
G